PCIe Sysfs

My desktop

[hi on] nanzhou@nanzhou2:~$ lspci
00:00.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Root Complex
00:00.2 IOMMU: Advanced Micro Devices, Inc. [AMD] Starship/Matisse IOMMU
00:01.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge
00:01.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse GPP Bridge
00:02.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge
00:03.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge
00:03.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse GPP Bridge
00:04.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge
00:05.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge
00:07.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge
00:07.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Internal PCIe GPP Bridge 0 to bus[E:B]
00:08.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge
00:08.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Internal PCIe GPP Bridge 0 to bus[E:B]
00:14.0 SMBus: Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller (rev 61)
00:14.3 ISA bridge: Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge (rev 51)
00:18.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship Device 24; Function 0
00:18.1 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship Device 24; Function 1
00:18.2 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship Device 24; Function 2
00:18.3 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship Device 24; Function 3
00:18.4 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship Device 24; Function 4
00:18.5 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship Device 24; Function 5
00:18.6 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship Device 24; Function 6
00:18.7 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship Device 24; Function 7
01:00.0 Ethernet controller: Aquantia Corp. AQtion AQC107 NBase-T/IEEE 802.3an Ethernet Controller [Atlantic 10G] (rev 02)
02:00.0 PCI bridge: Advanced Micro Devices, Inc. [AMD] Matisse Switch Upstream
03:08.0 PCI bridge: Advanced Micro Devices, Inc. [AMD] Matisse PCIe GPP Bridge
03:09.0 PCI bridge: Advanced Micro Devices, Inc. [AMD] Matisse PCIe GPP Bridge
03:0a.0 PCI bridge: Advanced Micro Devices, Inc. [AMD] Matisse PCIe GPP Bridge
04:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Reserved SPP
04:00.1 USB controller: Advanced Micro Devices, Inc. [AMD] Matisse USB 3.0 Host Controller
04:00.3 USB controller: Advanced Micro Devices, Inc. [AMD] Matisse USB 3.0 Host Controller
05:00.0 SATA controller: Advanced Micro Devices, Inc. [AMD] FCH SATA Controller [AHCI mode] (rev 51)
06:00.0 SATA controller: Advanced Micro Devices, Inc. [AMD] FCH SATA Controller [AHCI mode] (rev 51)
07:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Function
08:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Reserved SPP
08:00.3 USB controller: Advanced Micro Devices, Inc. [AMD] Starship USB 3.0 Host Controller
20:00.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Root Complex
20:00.2 IOMMU: Advanced Micro Devices, Inc. [AMD] Starship/Matisse IOMMU
20:01.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge
20:01.2 PCI bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse GPP Bridge
20:02.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge
20:03.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge
20:04.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge
20:05.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge
20:07.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge
20:07.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Internal PCIe GPP Bridge 0 to bus[E:B]
20:08.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge
20:08.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Internal PCIe GPP Bridge 0 to bus[E:B]
21:00.0 Non-Volatile memory controller: Samsung Electronics Co Ltd NVMe SSD Controller PM9A1/PM9A3/980PRO
22:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Function
23:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Reserved SPP
23:00.1 Encryption controller: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Cryptographic Coprocessor PSPCPP
23:00.3 USB controller: Advanced Micro Devices, Inc. [AMD] Starship USB 3.0 Host Controller
40:00.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Root Complex
40:00.2 IOMMU: Advanced Micro Devices, Inc. [AMD] Starship/Matisse IOMMU
40:01.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge
40:02.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge
40:03.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge
40:04.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge
40:05.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge
40:07.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge
40:07.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Internal PCIe GPP Bridge 0 to bus[E:B]
40:08.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge
40:08.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Internal PCIe GPP Bridge 0 to bus[E:B]
41:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Function
42:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Reserved SPP
60:00.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Root Complex
60:00.2 IOMMU: Advanced Micro Devices, Inc. [AMD] Starship/Matisse IOMMU
60:01.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge
60:02.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge
60:03.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge
60:03.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse GPP Bridge
60:04.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge
60:05.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge
60:07.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge
60:07.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Internal PCIe GPP Bridge 0 to bus[E:B]
60:08.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge
60:08.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Internal PCIe GPP Bridge 0 to bus[E:B]
61:00.0 VGA compatible controller: Advanced Micro Devices, Inc. [AMD/ATI] Lexa XT [Radeon PRO WX 3200] (rev 10)
61:00.1 Audio device: Advanced Micro Devices, Inc. [AMD/ATI] Baffin HDMI/DP Audio [Radeon RX 550 640SP / RX 560/560X]
62:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Function
63:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Reserved SPP

[hi on] nanzhou@nanzhou2:~$ lspci -t
-+-[0000:00]-+-00.0
| +-00.2
| +-01.0
| +-01.1-[01]----00.0
| +-02.0
| +-03.0
| +-03.1-[02-06]----00.0-[03-06]--+-08.0-[04]--+-00.0
| | | +-00.1
| | | \-00.3
| | +-09.0-[05]----00.0
| | \-0a.0-[06]----00.0
| +-04.0
| +-05.0
| +-07.0
| +-07.1-[07]----00.0
| +-08.0
| +-08.1-[08]--+-00.0
| | \-00.3
| +-14.0
| +-14.3
| +-18.0
| +-18.1
| +-18.2
| +-18.3
| +-18.4
| +-18.5
| +-18.6
| \-18.7
+-[0000:20]-+-00.0
| +-00.2
| +-01.0
| +-01.2-[21]----00.0
| +-02.0
| +-03.0
| +-04.0
| +-05.0
| +-07.0
| +-07.1-[22]----00.0
| +-08.0
| \-08.1-[23]--+-00.0
| +-00.1
| \-00.3
+-[0000:40]-+-00.0
| +-00.2
| +-01.0
| +-02.0
| +-03.0
| +-04.0
| +-05.0
| +-07.0
| +-07.1-[41]----00.0
| +-08.0
| \-08.1-[42]----00.0
\-[0000:60]-+-00.0
+-00.2
+-01.0
+-02.0
+-03.0
+-03.1-[61]--+-00.0
| \-00.1
+-04.0
+-05.0
+-07.0
+-07.1-[62]----00.0
+-08.0
\-08.1-[63]----00.0



The PCIe graph looks like the following

Put them together, we have

[0000:00] (CPU I/O Die - Segment 0)
 ├── 0000:00:00.0 ── [AMD] Starship/Matisse Root Complex
 ├── 0000:00:00.2 ── [AMD] Starship/Matisse IOMMU
 ├── 0000:00:01.0 ── [AMD] Starship/Matisse PCIe Dummy Host Bridge
 ├── 0000:00:01.1 ── [AMD] Starship/Matisse GPP Bridge (PCI Bridge)
 │    └── 0000:01:00.0 ── [Aquantia] AQC107 10-Gigabit Ethernet Controller
 ├── 0000:00:02.0 ── [AMD] Starship/Matisse PCIe Dummy Host Bridge
 ├── 0000:00:03.0 ── [AMD] Starship/Matisse PCIe Dummy Host Bridge
 ├── 0000:00:03.1 ── [AMD] Starship/Matisse GPP Bridge (CPU to Chipset Link)
 │    └── 0000:02:00.0 ── [AMD] Matisse Upstream Switch (Motherboard Chipset Chip)
 │         ├── 0000:03:08.0 ── [AMD] Matisse PCIe GPP Bridge
 │         │    ├── 0000:04:00.0 ── [AMD] Starship/Matisse Reserved SPP (Co-processor)
 │         │    ├── 0000:04:00.1 ── [AMD] Matisse USB 3.0 Host Controller
 │         │    └── 0000:04:00.3 ── [AMD] Matisse USB 3.0 Host Controller
 │         ├── 0000:03:09.0 ── [AMD] Matisse PCIe GPP Bridge
 │         │    └── 0000:05:00.0 ── [AMD] FCH SATA Controller (AHCI Mode)
 │         └── 0000:03:0a.0 ── [AMD] Matisse PCIe GPP Bridge
 │              └── 0000:06:00.0 ── [AMD] FCH SATA Controller (AHCI Mode)
 ├── 0000:00:04.0 ── [AMD] Starship/Matisse PCIe Dummy Host Bridge
 ├── 0000:00:05.0 ── [AMD] Starship/Matisse PCIe Dummy Host Bridge
 ├── 0000:00:07.0 ── [AMD] Starship/Matisse PCIe Dummy Host Bridge
 ├── 0000:00:07.1 ── [AMD] Starship/Matisse Internal GPP Bridge
 │    └── 0000:07:00.0 ── [AMD] Starship/Matisse PCIe Dummy Function
 ├── 0000:00:08.0 ── [AMD] Starship/Matisse PCIe Dummy Host Bridge
 ├── 0000:00:08.1 ── [AMD] Starship/Matisse Internal GPP Bridge
 │    ├── 0000:08:00.0 ── [AMD] Starship/Matisse Reserved SPP
 │    └── 0000:08:00.3 ── [AMD] Starship USB 3.0 Host Controller
 ├── 0000:00:14.0 ── [AMD] FCH SMBus Controller
 ├── 0000:00:14.3 ── [AMD] FCH LPC Bridge (ISA Bus)
 ├── 0000:00:18.0 ── [AMD] Starship Device 24; Function 0 (Data Fabric)
 ├── 0000:00:18.1 ── [AMD] Starship Device 24; Function 1 (Data Fabric)
 ├── 0000:00:18.2 ── [AMD] Starship Device 24; Function 2 (Data Fabric)
 ├── 0000:00:18.3 ── [AMD] Starship Device 24; Function 3 (Data Fabric)
 ├── 0000:00:18.4 ── [AMD] Starship Device 24; Function 4 (Data Fabric)
 ├── 0000:00:18.5 ── [AMD] Starship Device 24; Function 5 (Data Fabric)
 ├── 0000:00:18.6 ── [AMD] Starship Device 24; Function 6 (Data Fabric)
 └── 0000:00:18.7 ── [AMD] Starship Device 24; Function 7 (Data Fabric)

[0000:20] (CPU I/O Die - Segment 1)
 ├── 0000:20:00.0 ── [AMD] Starship/Matisse Root Complex
 ├── 0000:20:00.2 ── [AMD] Starship/Matisse IOMMU
 ├── 0000:20:01.0 ── [AMD] Starship/Matisse PCIe Dummy Host Bridge
 ├── 0000:20:01.2 ── [AMD] Starship/Matisse GPP Bridge
 │    └── 0000:21:00.0 ── [Samsung] NVMe SSD Controller (PM9A1/PM9A3/980PRO M.2 SSD)
 ├── 0000:20:02.0 ── [AMD] Starship/Matisse PCIe Dummy Host Bridge
 ├── 0000:20:03.0 ── [AMD] Starship/Matisse PCIe Dummy Host Bridge
 ├── 0000:20:04.0 ── [AMD] Starship/Matisse PCIe Dummy Host Bridge
 ├── 0000:20:05.0 ── [AMD] Starship/Matisse PCIe Dummy Host Bridge
 ├── 0000:20:07.0 ── [AMD] Starship/Matisse PCIe Dummy Host Bridge
 ├── 0000:20:07.1 ── [AMD] Starship/Matisse Internal GPP Bridge
 │    └── 0000:22:00.0 ── [AMD] Starship/Matisse PCIe Dummy Function
 ├── 0000:20:08.0 ── [AMD] Starship/Matisse PCIe Dummy Host Bridge
 └── 0000:20:08.1 ── [AMD] Starship/Matisse Internal GPP Bridge
      ├── 0000:23:00.0 ── [AMD] Starship/Matisse Reserved SPP
      ├── 0000:23:00.1 ── [AMD] Cryptographic Coprocessor PSPCPP
      └── 0000:23:00.3 ── [AMD] Starship USB 3.0 Host Controller

[0000:40] (CPU I/O Die - Segment 2)
 ├── 0000:40:00.0 ── [AMD] Starship/Matisse Root Complex
 ├── 0000:40:00.2 ── [AMD] Starship/Matisse IOMMU
 ├── 0000:40:01.0 ── [AMD] Starship/Matisse PCIe Dummy Host Bridge
 ├── 0000:40:02.0 ── [AMD] Starship/Matisse PCIe Dummy Host Bridge
 ├── 0000:40:03.0 ── [AMD] Starship/Matisse PCIe Dummy Host Bridge
 ├── 0000:40:04.0 ── [AMD] Starship/Matisse PCIe Dummy Host Bridge
 ├── 0000:40:05.0 ── [AMD] Starship/Matisse PCIe Dummy Host Bridge
 ├── 0000:40:07.0 ── [AMD] Starship/Matisse PCIe Dummy Host Bridge
 ├── 0000:40:07.1 ── [AMD] Starship/Matisse Internal GPP Bridge
 │    └── 0000:41:00.0 ── [AMD] Starship/Matisse PCIe Dummy Function
 ├── 0000:40:08.0 ── [AMD] Starship/Matisse PCIe Dummy Host Bridge
 └── 0000:40:08.1 ── [AMD] Starship/Matisse Internal GPP Bridge
      └── 0000:42:00.0 ── [AMD] Starship/Matisse Reserved SPP

[0000:60] (CPU I/O Die - Segment 3)
 ├── 0000:60:00.0 ── [AMD] Starship/Matisse Root Complex
 ├── 0000:60:00.2 ── [AMD] Starship/Matisse IOMMU
 ├── 0000:60:01.0 ── [AMD] Starship/Matisse PCIe Dummy Host Bridge
 ├── 0000:60:02.0 ── [AMD] Starship/Matisse PCIe Dummy Host Bridge
 ├── 0000:60:03.0 ── [AMD] Starship/Matisse PCIe Dummy Host Bridge
 ├── 0000:60:03.1 ── [AMD] Starship/Matisse GPP Bridge (Primary GPU Slot)
 │    ├── 0000:61:00.0 ── [AMD/ATI] Lexa XT [Radeon PRO WX 3200] (Workstation GPU)
 │    └── 0000:61:00.1 ── [AMD/ATI] Baffin HDMI/DP Audio (Integrated Display Sound Chip)
 ├── 0000:60:04.0 ── [AMD] Starship/Matisse PCIe Dummy Host Bridge
 ├── 0000:60:05.0 ── [AMD] Starship/Matisse PCIe Dummy Host Bridge
 ├── 0000:60:07.0 ── [AMD] Starship/Matisse PCIe Dummy Host Bridge
 ├── 0000:60:07.1 ── [AMD] Starship/Matisse Internal GPP Bridge
 │    └── 0000:62:00.0 ── [AMD] Starship/Matisse PCIe Dummy Function
 ├── 0000:60:08.0 ── [AMD] Starship/Matisse PCIe Dummy Host Bridge
 └── 0000:60:08.1 ── [AMD] Starship/Matisse Internal GPP Bridge
      └── 0000:63:00.0 ── [AMD] Starship/Matisse Reserved SPP

1. Decoding the Address (Fully Qualified Domain BDF)

When you see an address like 0000:61:00.1 (your GPU’s HDMI Audio Controller), the kernel is using a highly structured coordinate system [1]:

0000:61:001

SegmentYour ValueHardware Translation
Domain0000The Virtual Segment. Standard desktop PCs usually have only one domain (0000), but multi-socket enterprise servers can have more to isolate different physical CPUs.
Bus61The Road Segment. This represents the virtual highway that your graphics card sits on. Your GPU card owns Bus 61 [1].
Device00The Physical Chip. This is the physical silicon package plugged into the motherboard PCIe slot.
Function1The Sub-Component. Your graphics card is a multi-function device [1]. The GPU itself is Function .0 (0000:61:00.0), while the audio controller that drives sound to your HDMI/DisplayPort monitor is Function .1 (0000:61:00.1) [1]. They share the exact same physical slot, but the OS treats them as distinct cards!

2. The Two Faces of Sysfs: Dynamic vs. Stable Paths

When navigating /sys, the Linux kernel gives you two distinct ways to access your PCIe hardware [1]. Let’s look at your Samsung NVMe SSD to compare them:

📍 Option A: The Dynamic Bus Path (The Symlink)

/sys/bus/pci/devices/0000:21:00.0/

This is a flat list of all PCI devices. It is highly convenient, but unstable. If you were to plug in a second M.2 SSD, your motherboard might shift this SSD to bus 22, changing the folder name entirely [1].

🌲 Option B: The Stable Physical Path (The Real Directory)

If you track where that symlink points, it leads to the true physical location under /sys/devices/ [1]:

/sys/devices/pci0000:20/0000:20:01.2/0000:21:00.0/

This path represents the exact copper routing from your CPU core down to the physical M.2 slot [1]. This directory path is 100% stable (as long as the switch works okay) and will never change, no matter what you plug in or how BDFs shift:

  • pci0000:20 represents your CPU’s internal high-speed Memory Controller / I/O Die (Segment 1).
  • 0000:20:01.2 is the physical Root Port Bridge built into the CPU socket.
  • 0000:21:00.0 is the actual Samsung SSD sitting inside the M.2 slot wired to that port.

3. Parent-Child Hierarchies (Directory Nesting = Motherboard Wiring)

The most elegant feature of sysfs is that directory containment directly mirrors physical hardware connection [1]. If a device is downstream of a switch, its folder lives inside that switch’s folder.

Let’s look at how your USB Host Controller (04:00.1) is nested inside the stable physical path [1]:

/sys/devices/pci0000:00/             <── CPU Root Complex (I/O Die)
└── 0000:00:03.1/                    <── Root Port Bridge (on the CPU)
    └── 0000:02:00.0/                <── Matisse Upstream Switch (Motherboard Chipset Chip)
        └── 0000:03:08.0/            <── Matisse Downstream Bridge
            └── 0000:04:00.1/        <── Physical USB 3.0 Host Controller (on your back I/O panel)

If you navigate into /sys/devices/pci0000:00/0000:00:03.1/0000:02:00.0/, you are literally standing inside the AMD Matisse chipset on your motherboard. The folders inside it represent the individual physical silicon lanes branching out to your SATA ports and USB controllers [1].


4. Interactive Attributes inside the Folders

If you run ls -F /sys/bus/pci/devices/0000:21:00.0/ (your NVMe SSD), you won’t see traditional subfolders. Instead, you’ll find specialized files that bridge software to physical silicon:

  • current_link_speed / current_link_width: Real-time virtual registers. Reading them queries the physical PCIe link controller to ask how fast the copper wires are transmitting data right now [1].
  • msi_irqs/: A folder containing files for every active CPU interrupt. This maps how the SSD signals your CPU cores when a data read completes.
  • power/control: Write auto or on to this file to let the Linux kernel dynamically shut down the PCIe link lanes to save battery/power when the SSD is idle.

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