{"id":1816,"date":"2026-07-22T15:07:33","date_gmt":"2026-07-22T22:07:33","guid":{"rendered":"https:\/\/nanzhou.cc\/?p=1816"},"modified":"2026-07-22T15:09:16","modified_gmt":"2026-07-22T22:09:16","slug":"pcie-sysfs","status":"publish","type":"post","link":"https:\/\/nanzhou.cc\/index.php\/2026\/07\/22\/pcie-sysfs\/","title":{"rendered":"PCIe Sysfs"},"content":{"rendered":"\n

My desktop<\/h2>\n\n\n\n
[hi on] nanzhou@nanzhou2:~$ lspci
00:00.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse Root Complex
00:00.2 IOMMU: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse IOMMU
00:01.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse PCIe Dummy Host Bridge
00:01.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse GPP Bridge
00:02.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse PCIe Dummy Host Bridge
00:03.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse PCIe Dummy Host Bridge
00:03.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse GPP Bridge
00:04.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse PCIe Dummy Host Bridge
00:05.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse PCIe Dummy Host Bridge
00:07.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse PCIe Dummy Host Bridge
00:07.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse Internal PCIe GPP Bridge 0 to bus[E:B]
00:08.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse PCIe Dummy Host Bridge
00:08.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse Internal PCIe GPP Bridge 0 to bus[E:B]
00:14.0 SMBus: Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller (rev 61)
00:14.3 ISA bridge: Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge (rev 51)
00:18.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship Device 24; Function 0
00:18.1 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship Device 24; Function 1
00:18.2 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship Device 24; Function 2
00:18.3 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship Device 24; Function 3
00:18.4 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship Device 24; Function 4
00:18.5 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship Device 24; Function 5
00:18.6 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship Device 24; Function 6
00:18.7 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship Device 24; Function 7
01:00.0 Ethernet controller: Aquantia Corp. AQtion AQC107 NBase-T\/IEEE 802.3an Ethernet Controller [Atlantic 10G] (rev 02)
02:00.0 PCI bridge: Advanced Micro Devices, Inc. [AMD] Matisse Switch Upstream
03:08.0 PCI bridge: Advanced Micro Devices, Inc. [AMD] Matisse PCIe GPP Bridge
03:09.0 PCI bridge: Advanced Micro Devices, Inc. [AMD] Matisse PCIe GPP Bridge
03:0a.0 PCI bridge: Advanced Micro Devices, Inc. [AMD] Matisse PCIe GPP Bridge
04:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse Reserved SPP
04:00.1 USB controller: Advanced Micro Devices, Inc. [AMD] Matisse USB 3.0 Host Controller
04:00.3 USB controller: Advanced Micro Devices, Inc. [AMD] Matisse USB 3.0 Host Controller
05:00.0 SATA controller: Advanced Micro Devices, Inc. [AMD] FCH SATA Controller [AHCI mode] (rev 51)
06:00.0 SATA controller: Advanced Micro Devices, Inc. [AMD] FCH SATA Controller [AHCI mode] (rev 51)
07:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse PCIe Dummy Function
08:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse Reserved SPP
08:00.3 USB controller: Advanced Micro Devices, Inc. [AMD] Starship USB 3.0 Host Controller
20:00.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse Root Complex
20:00.2 IOMMU: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse IOMMU
20:01.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse PCIe Dummy Host Bridge
20:01.2 PCI bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse GPP Bridge
20:02.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse PCIe Dummy Host Bridge
20:03.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse PCIe Dummy Host Bridge
20:04.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse PCIe Dummy Host Bridge
20:05.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse PCIe Dummy Host Bridge
20:07.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse PCIe Dummy Host Bridge
20:07.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse Internal PCIe GPP Bridge 0 to bus[E:B]
20:08.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse PCIe Dummy Host Bridge
20:08.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse Internal PCIe GPP Bridge 0 to bus[E:B]
21:00.0 Non-Volatile memory controller: Samsung Electronics Co Ltd NVMe SSD Controller PM9A1\/PM9A3\/980PRO
22:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse PCIe Dummy Function
23:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse Reserved SPP
23:00.1 Encryption controller: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse Cryptographic Coprocessor PSPCPP
23:00.3 USB controller: Advanced Micro Devices, Inc. [AMD] Starship USB 3.0 Host Controller
40:00.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse Root Complex
40:00.2 IOMMU: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse IOMMU
40:01.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse PCIe Dummy Host Bridge
40:02.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse PCIe Dummy Host Bridge
40:03.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse PCIe Dummy Host Bridge
40:04.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse PCIe Dummy Host Bridge
40:05.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse PCIe Dummy Host Bridge
40:07.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse PCIe Dummy Host Bridge
40:07.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse Internal PCIe GPP Bridge 0 to bus[E:B]
40:08.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse PCIe Dummy Host Bridge
40:08.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse Internal PCIe GPP Bridge 0 to bus[E:B]
41:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse PCIe Dummy Function
42:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse Reserved SPP
60:00.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse Root Complex
60:00.2 IOMMU: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse IOMMU
60:01.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse PCIe Dummy Host Bridge
60:02.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse PCIe Dummy Host Bridge
60:03.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse PCIe Dummy Host Bridge
60:03.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse GPP Bridge
60:04.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse PCIe Dummy Host Bridge
60:05.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse PCIe Dummy Host Bridge
60:07.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse PCIe Dummy Host Bridge
60:07.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse Internal PCIe GPP Bridge 0 to bus[E:B]
60:08.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse PCIe Dummy Host Bridge
60:08.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse Internal PCIe GPP Bridge 0 to bus[E:B]
61:00.0 VGA compatible controller: Advanced Micro Devices, Inc. [AMD\/ATI] Lexa XT [Radeon PRO WX 3200] (rev 10)
61:00.1 Audio device: Advanced Micro Devices, Inc. [AMD\/ATI] Baffin HDMI\/DP Audio [Radeon RX 550 640SP \/ RX 560\/560X]
62:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse PCIe Dummy Function
63:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship\/Matisse Reserved SPP

[hi on] nanzhou@nanzhou2:~$ lspci -t
-+-[0000:00]-+-00.0
 |           +-00.2
 |           +-01.0
 |           +-01.1-[01]----00.0
 |           +-02.0
 |           +-03.0
 |           +-03.1-[02-06]----00.0-[03-06]--+-08.0-[04]--+-00.0
 |           |                               |            +-00.1
 |           |                               |            \\-00.3
 |           |                               +-09.0-[05]----00.0
 |           |                               \\-0a.0-[06]----00.0
 |           +-04.0
 |           +-05.0
 |           +-07.0
 |           +-07.1-[07]----00.0
 |           +-08.0
 |           +-08.1-[08]--+-00.0
 |           |            \\-00.3
 |           +-14.0
 |           +-14.3
 |           +-18.0
 |           +-18.1
 |           +-18.2
 |           +-18.3
 |           +-18.4
 |           +-18.5
 |           +-18.6
 |           \\-18.7
 +-[0000:20]-+-00.0
 |           +-00.2
 |           +-01.0
 |           +-01.2-[21]----00.0
 |           +-02.0
 |           +-03.0
 |           +-04.0
 |           +-05.0
 |           +-07.0
 |           +-07.1-[22]----00.0
 |           +-08.0
 |           \\-08.1-[23]--+-00.0
 |                        +-00.1
 |                        \\-00.3
 +-[0000:40]-+-00.0
 |           +-00.2
 |           +-01.0
 |           +-02.0
 |           +-03.0
 |           +-04.0
 |           +-05.0
 |           +-07.0
 |           +-07.1-[41]----00.0
 |           +-08.0
 |           \\-08.1-[42]----00.0
 \\-[0000:60]-+-00.0
             +-00.2
             +-01.0
             +-02.0
             +-03.0
             +-03.1-[61]--+-00.0
             |            \\-00.1
             +-04.0
             +-05.0
             +-07.0
             +-07.1-[62]----00.0
             +-08.0
             \\-08.1-[63]----00.0



The PCIe graph looks like the following<\/code><\/pre>\n\n\n\n
Put them together, we have<\/p>\n\n\n\n
[0000:00] (CPU I\/O Die - Segment 0)\n \u251c\u2500\u2500 0000:00:00.0 \u2500\u2500 [AMD] Starship\/Matisse Root Complex\n \u251c\u2500\u2500 0000:00:00.2 \u2500\u2500 [AMD] Starship\/Matisse IOMMU\n \u251c\u2500\u2500 0000:00:01.0 \u2500\u2500 [AMD] Starship\/Matisse PCIe Dummy Host Bridge\n \u251c\u2500\u2500 0000:00:01.1 \u2500\u2500 [AMD] Starship\/Matisse GPP Bridge (PCI Bridge)\n \u2502    \u2514\u2500\u2500 0000:01:00.0 \u2500\u2500 [Aquantia] AQC107 10-Gigabit Ethernet Controller\n \u251c\u2500\u2500 0000:00:02.0 \u2500\u2500 [AMD] Starship\/Matisse PCIe Dummy Host Bridge\n \u251c\u2500\u2500 0000:00:03.0 \u2500\u2500 [AMD] Starship\/Matisse PCIe Dummy Host Bridge\n \u251c\u2500\u2500 0000:00:03.1 \u2500\u2500 [AMD] Starship\/Matisse GPP Bridge (CPU to Chipset Link)\n \u2502    \u2514\u2500\u2500 0000:02:00.0 \u2500\u2500 [AMD] Matisse Upstream Switch (Motherboard Chipset Chip)\n \u2502         \u251c\u2500\u2500 0000:03:08.0 \u2500\u2500 [AMD] Matisse PCIe GPP Bridge\n \u2502         \u2502    \u251c\u2500\u2500 0000:04:00.0 \u2500\u2500 [AMD] Starship\/Matisse Reserved SPP (Co-processor)\n \u2502         \u2502    \u251c\u2500\u2500 0000:04:00.1 \u2500\u2500 [AMD] Matisse USB 3.0 Host Controller\n \u2502         \u2502    \u2514\u2500\u2500 0000:04:00.3 \u2500\u2500 [AMD] Matisse USB 3.0 Host Controller\n \u2502         \u251c\u2500\u2500 0000:03:09.0 \u2500\u2500 [AMD] Matisse PCIe GPP Bridge\n \u2502         \u2502    \u2514\u2500\u2500 0000:05:00.0 \u2500\u2500 [AMD] FCH SATA Controller (AHCI Mode)\n \u2502         \u2514\u2500\u2500 0000:03:0a.0 \u2500\u2500 [AMD] Matisse PCIe GPP Bridge\n \u2502              \u2514\u2500\u2500 0000:06:00.0 \u2500\u2500 [AMD] FCH SATA Controller (AHCI Mode)\n \u251c\u2500\u2500 0000:00:04.0 \u2500\u2500 [AMD] Starship\/Matisse PCIe Dummy Host Bridge\n \u251c\u2500\u2500 0000:00:05.0 \u2500\u2500 [AMD] Starship\/Matisse PCIe Dummy Host Bridge\n \u251c\u2500\u2500 0000:00:07.0 \u2500\u2500 [AMD] Starship\/Matisse PCIe Dummy Host Bridge\n \u251c\u2500\u2500 0000:00:07.1 \u2500\u2500 [AMD] Starship\/Matisse Internal GPP Bridge\n \u2502    \u2514\u2500\u2500 0000:07:00.0 \u2500\u2500 [AMD] Starship\/Matisse PCIe Dummy Function\n \u251c\u2500\u2500 0000:00:08.0 \u2500\u2500 [AMD] Starship\/Matisse PCIe Dummy Host Bridge\n \u251c\u2500\u2500 0000:00:08.1 \u2500\u2500 [AMD] Starship\/Matisse Internal GPP Bridge\n \u2502    \u251c\u2500\u2500 0000:08:00.0 \u2500\u2500 [AMD] Starship\/Matisse Reserved SPP\n \u2502    \u2514\u2500\u2500 0000:08:00.3 \u2500\u2500 [AMD] Starship USB 3.0 Host Controller\n \u251c\u2500\u2500 0000:00:14.0 \u2500\u2500 [AMD] FCH SMBus Controller\n \u251c\u2500\u2500 0000:00:14.3 \u2500\u2500 [AMD] FCH LPC Bridge (ISA Bus)\n \u251c\u2500\u2500 0000:00:18.0 \u2500\u2500 [AMD] Starship Device 24; Function 0 (Data Fabric)\n \u251c\u2500\u2500 0000:00:18.1 \u2500\u2500 [AMD] Starship Device 24; Function 1 (Data Fabric)\n \u251c\u2500\u2500 0000:00:18.2 \u2500\u2500 [AMD] Starship Device 24; Function 2 (Data Fabric)\n \u251c\u2500\u2500 0000:00:18.3 \u2500\u2500 [AMD] Starship Device 24; Function 3 (Data Fabric)\n \u251c\u2500\u2500 0000:00:18.4 \u2500\u2500 [AMD] Starship Device 24; Function 4 (Data Fabric)\n \u251c\u2500\u2500 0000:00:18.5 \u2500\u2500 [AMD] Starship Device 24; Function 5 (Data Fabric)\n \u251c\u2500\u2500 0000:00:18.6 \u2500\u2500 [AMD] Starship Device 24; Function 6 (Data Fabric)\n \u2514\u2500\u2500 0000:00:18.7 \u2500\u2500 [AMD] Starship Device 24; Function 7 (Data Fabric)\n\n[0000:20] (CPU I\/O Die - Segment 1)\n \u251c\u2500\u2500 0000:20:00.0 \u2500\u2500 [AMD] Starship\/Matisse Root Complex\n \u251c\u2500\u2500 0000:20:00.2 \u2500\u2500 [AMD] Starship\/Matisse IOMMU\n \u251c\u2500\u2500 0000:20:01.0 \u2500\u2500 [AMD] Starship\/Matisse PCIe Dummy Host Bridge\n \u251c\u2500\u2500 0000:20:01.2 \u2500\u2500 [AMD] Starship\/Matisse GPP Bridge\n \u2502    \u2514\u2500\u2500 0000:21:00.0 \u2500\u2500 [Samsung] NVMe SSD Controller (PM9A1\/PM9A3\/980PRO M.2 SSD)\n \u251c\u2500\u2500 0000:20:02.0 \u2500\u2500 [AMD] Starship\/Matisse PCIe Dummy Host Bridge\n \u251c\u2500\u2500 0000:20:03.0 \u2500\u2500 [AMD] Starship\/Matisse PCIe Dummy Host Bridge\n \u251c\u2500\u2500 0000:20:04.0 \u2500\u2500 [AMD] Starship\/Matisse PCIe Dummy Host Bridge\n \u251c\u2500\u2500 0000:20:05.0 \u2500\u2500 [AMD] Starship\/Matisse PCIe Dummy Host Bridge\n \u251c\u2500\u2500 0000:20:07.0 \u2500\u2500 [AMD] Starship\/Matisse PCIe Dummy Host Bridge\n \u251c\u2500\u2500 0000:20:07.1 \u2500\u2500 [AMD] Starship\/Matisse Internal GPP Bridge\n \u2502    \u2514\u2500\u2500 0000:22:00.0 \u2500\u2500 [AMD] Starship\/Matisse PCIe Dummy Function\n \u251c\u2500\u2500 0000:20:08.0 \u2500\u2500 [AMD] Starship\/Matisse PCIe Dummy Host Bridge\n \u2514\u2500\u2500 0000:20:08.1 \u2500\u2500 [AMD] Starship\/Matisse Internal GPP Bridge\n      \u251c\u2500\u2500 0000:23:00.0 \u2500\u2500 [AMD] Starship\/Matisse Reserved SPP\n      \u251c\u2500\u2500 0000:23:00.1 \u2500\u2500 [AMD] Cryptographic Coprocessor PSPCPP\n      \u2514\u2500\u2500 0000:23:00.3 \u2500\u2500 [AMD] Starship USB 3.0 Host Controller\n\n[0000:40] (CPU I\/O Die - Segment 2)\n \u251c\u2500\u2500 0000:40:00.0 \u2500\u2500 [AMD] Starship\/Matisse Root Complex\n \u251c\u2500\u2500 0000:40:00.2 \u2500\u2500 [AMD] Starship\/Matisse IOMMU\n \u251c\u2500\u2500 0000:40:01.0 \u2500\u2500 [AMD] Starship\/Matisse PCIe Dummy Host Bridge\n \u251c\u2500\u2500 0000:40:02.0 \u2500\u2500 [AMD] Starship\/Matisse PCIe Dummy Host Bridge\n \u251c\u2500\u2500 0000:40:03.0 \u2500\u2500 [AMD] Starship\/Matisse PCIe Dummy Host Bridge\n \u251c\u2500\u2500 0000:40:04.0 \u2500\u2500 [AMD] Starship\/Matisse PCIe Dummy Host Bridge\n \u251c\u2500\u2500 0000:40:05.0 \u2500\u2500 [AMD] Starship\/Matisse PCIe Dummy Host Bridge\n \u251c\u2500\u2500 0000:40:07.0 \u2500\u2500 [AMD] Starship\/Matisse PCIe Dummy Host Bridge\n \u251c\u2500\u2500 0000:40:07.1 \u2500\u2500 [AMD] Starship\/Matisse Internal GPP Bridge\n \u2502    \u2514\u2500\u2500 0000:41:00.0 \u2500\u2500 [AMD] Starship\/Matisse PCIe Dummy Function\n \u251c\u2500\u2500 0000:40:08.0 \u2500\u2500 [AMD] Starship\/Matisse PCIe Dummy Host Bridge\n \u2514\u2500\u2500 0000:40:08.1 \u2500\u2500 [AMD] Starship\/Matisse Internal GPP Bridge\n      \u2514\u2500\u2500 0000:42:00.0 \u2500\u2500 [AMD] Starship\/Matisse Reserved SPP\n\n[0000:60] (CPU I\/O Die - Segment 3)\n \u251c\u2500\u2500 0000:60:00.0 \u2500\u2500 [AMD] Starship\/Matisse Root Complex\n \u251c\u2500\u2500 0000:60:00.2 \u2500\u2500 [AMD] Starship\/Matisse IOMMU\n \u251c\u2500\u2500 0000:60:01.0 \u2500\u2500 [AMD] Starship\/Matisse PCIe Dummy Host Bridge\n \u251c\u2500\u2500 0000:60:02.0 \u2500\u2500 [AMD] Starship\/Matisse PCIe Dummy Host Bridge\n \u251c\u2500\u2500 0000:60:03.0 \u2500\u2500 [AMD] Starship\/Matisse PCIe Dummy Host Bridge\n \u251c\u2500\u2500 0000:60:03.1 \u2500\u2500 [AMD] Starship\/Matisse GPP Bridge (Primary GPU Slot)\n \u2502    \u251c\u2500\u2500 0000:61:00.0 \u2500\u2500 [AMD\/ATI] Lexa XT [Radeon PRO WX 3200] (Workstation GPU)\n \u2502    \u2514\u2500\u2500 0000:61:00.1 \u2500\u2500 [AMD\/ATI] Baffin HDMI\/DP Audio (Integrated Display Sound Chip)\n \u251c\u2500\u2500 0000:60:04.0 \u2500\u2500 [AMD] Starship\/Matisse PCIe Dummy Host Bridge\n \u251c\u2500\u2500 0000:60:05.0 \u2500\u2500 [AMD] Starship\/Matisse PCIe Dummy Host Bridge\n \u251c\u2500\u2500 0000:60:07.0 \u2500\u2500 [AMD] Starship\/Matisse PCIe Dummy Host Bridge\n \u251c\u2500\u2500 0000:60:07.1 \u2500\u2500 [AMD] Starship\/Matisse Internal GPP Bridge\n \u2502    \u2514\u2500\u2500 0000:62:00.0 \u2500\u2500 [AMD] Starship\/Matisse PCIe Dummy Function\n \u251c\u2500\u2500 0000:60:08.0 \u2500\u2500 [AMD] Starship\/Matisse PCIe Dummy Host Bridge\n \u2514\u2500\u2500 0000:60:08.1 \u2500\u2500 [AMD] Starship\/Matisse Internal GPP Bridge\n      \u2514\u2500\u2500 0000:63:00.0 \u2500\u2500 [AMD] Starship\/Matisse Reserved SPP\n<\/code><\/pre>\n\n\n\n
1. Decoding the Address (Fully Qualified Domain BDF)<\/h2>\n\n\n\n
When you see an address like 0000:61:00.1<\/code><\/strong> (your GPU\u2019s HDMI Audio Controller), the kernel is using a highly structured coordinate system [1]:<\/p>\n\n\n\n
0000<\/strong>:61<\/strong>:00<\/strong>\u22c51<\/strong><\/p>\n\n\n\n
Segment<\/th>Your Value<\/th>Hardware Translation<\/th><\/tr>
Domain<\/strong><\/td>0000<\/code><\/td>The Virtual Segment<\/strong>. Standard desktop PCs usually have only one domain (0000<\/code>), but multi-socket enterprise servers can have more to isolate different physical CPUs.<\/td><\/tr>
Bus<\/strong><\/td>61<\/code><\/td>The Road Segment<\/strong>. This represents the virtual highway that your graphics card sits on. Your GPU card owns Bus 61<\/code> [1].<\/td><\/tr>
Device<\/strong><\/td>00<\/code><\/td>The Physical Chip<\/strong>. This is the physical silicon package plugged into the motherboard PCIe slot.<\/td><\/tr>
Function<\/strong><\/td>1<\/code><\/td>The Sub-Component<\/strong>. Your graphics card is a multi-function<\/em> device [1]. The GPU itself is Function .0<\/code> (0000:61:00.0<\/code>), while the audio controller that drives sound to your HDMI\/DisplayPort monitor is Function .1<\/code> (0000:61:00.1<\/code>) [1]. They share the exact same physical slot, but the OS treats them as distinct cards!<\/td><\/tr><\/tbody><\/table><\/figure>\n\n\n\n
2. The Two Faces of Sysfs: Dynamic vs. Stable Paths<\/h3>\n\n\n\n
When navigating \/sys<\/code>, the Linux kernel gives you two distinct ways to access your PCIe hardware [1]. Let\u2019s look at your Samsung NVMe SSD<\/strong> to compare them:<\/p>\n\n\n\n
\ud83d\udccd Option A: The Dynamic Bus Path (The Symlink)<\/h4>\n\n\n\n
\/sys\/bus\/pci\/devices\/0000:21:00.0\/\n<\/code><\/pre>\n\n\n\n
This is a flat list of all PCI devices. It is highly convenient, but unstable<\/strong>. If you were to plug in a second M.2 SSD, your motherboard might shift this SSD to bus 22<\/code>, changing the folder name entirely [1].<\/p>\n\n\n\n
\ud83c\udf32 Option B: The Stable Physical Path (The Real Directory)<\/h4>\n\n\n\n
If you track where that symlink points, it leads to the true physical location under \/sys\/devices\/<\/code> [1]:<\/p>\n\n\n\n
\/sys\/devices\/pci0000:20\/0000:20:01.2\/0000:21:00.0\/\n<\/code><\/pre>\n\n\n\n
This path represents the exact copper routing from your CPU core down to the physical M.2 slot [1]. This directory path is\u00a0100% stable<\/strong>\u00a0(as long as the switch works okay) and will never change, no matter what you plug in or how BDFs shift:<\/p>\n\n\n\n
    \n
  • pci0000:20<\/code>\u00a0represents your CPU’s internal high-speed Memory Controller \/ I\/O Die (Segment 1).<\/li>\n\n\n\n
  • 0000:20:01.2<\/code>\u00a0is the physical Root Port Bridge built into the CPU socket.<\/li>\n\n\n\n
  • 0000:21:00.0<\/code>\u00a0is the actual Samsung SSD sitting inside the M.2 slot wired to that port.<\/li>\n<\/ul>\n\n\n\n
    \n\n\n\n
    3. Parent-Child Hierarchies (Directory Nesting = Motherboard Wiring)<\/h3>\n\n\n\n
    The most elegant feature of sysfs<\/code> is that directory containment directly mirrors physical hardware connection<\/strong> [1]. If a device is downstream of a switch, its folder lives inside that switch’s folder.<\/p>\n\n\n\n
    Let’s look at how your USB Host Controller<\/strong> (04:00.1<\/code>) is nested inside the stable physical path [1]:<\/p>\n\n\n\n
    \/sys\/devices\/pci0000:00\/             <\u2500\u2500 CPU Root Complex (I\/O Die)\n\u2514\u2500\u2500 0000:00:03.1\/                    <\u2500\u2500 Root Port Bridge (on the CPU)\n    \u2514\u2500\u2500 0000:02:00.0\/                <\u2500\u2500 Matisse Upstream Switch (Motherboard Chipset Chip)\n        \u2514\u2500\u2500 0000:03:08.0\/            <\u2500\u2500 Matisse Downstream Bridge\n            \u2514\u2500\u2500 0000:04:00.1\/        <\u2500\u2500 Physical USB 3.0 Host Controller (on your back I\/O panel)\n<\/code><\/pre>\n\n\n\n
    If you navigate into \/sys\/devices\/pci0000:00\/0000:00:03.1\/0000:02:00.0\/<\/code>, you are literally standing inside the AMD Matisse chipset on your motherboard. The folders inside it represent the individual physical silicon lanes branching out to your SATA ports and USB controllers [1].<\/p>\n\n\n\n
    \n\n\n\n
    4. Interactive Attributes inside the Folders<\/h3>\n\n\n\n
    If you run ls -F \/sys\/bus\/pci\/devices\/0000:21:00.0\/<\/code> (your NVMe SSD), you won’t see traditional subfolders. Instead, you’ll find specialized files that bridge software to physical silicon:<\/p>\n\n\n\n
      \n
    • current_link_speed<\/code>\u00a0\/\u00a0current_link_width<\/code><\/strong>: Real-time virtual registers. Reading them queries the physical PCIe link controller to ask how fast the copper wires are transmitting data\u00a0right now<\/em>\u00a0[1].<\/li>\n\n\n\n
    • msi_irqs\/<\/code><\/strong>: A folder containing files for every active CPU interrupt. This maps how the SSD signals your CPU cores when a data read completes.<\/li>\n\n\n\n
    • power\/control<\/code><\/strong>: Write\u00a0auto<\/code>\u00a0or\u00a0on<\/code>\u00a0to this file to let the Linux kernel dynamically shut down the PCIe link lanes to save battery\/power when the SSD is idle.<\/li>\n<\/ul>\n\n\n\n
      <\/p>\n","protected":false},"excerpt":{"rendered":"
      My desktop Put them together, we have 1. Decoding the Address (Fully Qualified Domain BDF) When you see an address like 0000:61:00.1 (your GPU\u2019s HDMI Audio Controller), the kernel is using a highly structured coordinate system [1]: 0000:61:00\u22c51 Segment Your Value Hardware Translation Domain 0000 The Virtual Segment. Standard desktop PCs usually have only one domain (0000),…<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"0","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[76],"tags":[],"class_list":["post-1816","post","type-post","status-publish","format-standard","hentry","category-embedded"],"_links":{"self":[{"href":"https:\/\/nanzhou.cc\/index.php\/wp-json\/wp\/v2\/posts\/1816","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/nanzhou.cc\/index.php\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/nanzhou.cc\/index.php\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/nanzhou.cc\/index.php\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/nanzhou.cc\/index.php\/wp-json\/wp\/v2\/comments?post=1816"}],"version-history":[{"count":1,"href":"https:\/\/nanzhou.cc\/index.php\/wp-json\/wp\/v2\/posts\/1816\/revisions"}],"predecessor-version":[{"id":1817,"href":"https:\/\/nanzhou.cc\/index.php\/wp-json\/wp\/v2\/posts\/1816\/revisions\/1817"}],"wp:attachment":[{"href":"https:\/\/nanzhou.cc\/index.php\/wp-json\/wp\/v2\/media?parent=1816"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/nanzhou.cc\/index.php\/wp-json\/wp\/v2\/categories?post=1816"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/nanzhou.cc\/index.php\/wp-json\/wp\/v2\/tags?post=1816"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}